In typical computer systems, several control operations occur concurrently. Many of these control operations, or threads of execution, require the development of a specific set of uninterrupted steps in order to achieve a desired state. Oftentimes, during such critical operations, one thread of execution will impair other threads from executing by inhibiting interrupts in a processor of the system. While this normally maintains proper operation in a single processor system, computer systems with more than a single processor require more careful control.
With multi-processor systems, inhibiting interrupts during a critical sequence in a single processor, such as while an input/output (I/O) device is being accessed, does not necessarily inhibit access to the device by all processors. A typical way of handling such situations is to use synchronization objects within the processing system and manipulate these objects through operating system API (application program interface) calls.
For example, semaphore objects have sometimes been used as synchronization objects. Typically, threads of execution must first make a call to the operating system to try and acquire the semaphore object and then the system either grants or denies ownership of the object to the threads. The operating system ensures that only one thread has ownership of the object at any one time, and only the thread with ownership can release that ownership. Thus, access to a peripheral I/O device would sometimes be associated with a semaphore object to ensure that two threads do not try to control the I/O device at the same time and interfere with each other. Although synchronization objects do ensure a lack of interference, their implementation through the operating system slows down the operation. For accesses to an I/O device that do not require a significant amount of time, the call to the operating system and a requisite execution of many instructions can take more time than access time itself. Such delays reduce overall operating performance. Further frustration exists due to the small number of times that two or more threads actually desire simultaneous control of and access to a device.
Additionally, attempts to employ relatively quick synchronization primitives provided by the CPU architecture do not fully alleviate the problem. These primitives are processor-specific instructions. Therefore, these primitives do not automatically and transparently translate to run with other types of processors, such as x86, PowerPC.TM., DEC Alpha, etc. Of course, specific operating system calls could be made to create the transparency, but the difficulties and reduction of performance from using such calls, as described above, makes such use prohibitive.
A need exists for a synchronization mechanism that maintains coherent operation in a processing system without reducing performance and that can be used transparently with various processors. The present invention addresses such a need.